source: CIVL/mods/dev.civl.com/examples/omp/dataracebench-1.3.2/micro-benchmarks/DRB124-master-orig-yes.c@ cb4d4f4

main test-branch
Last change on this file since cb4d4f4 was aad342c, checked in by Stephen Siegel <siegel@…>, 3 years ago

Performing huge refactor to incorporate ABC, GMC, and SARL into CIVL repo and use Java modules.

git-svn-id: svn://vsl.cis.udel.edu/civl/trunk@5664 fb995dde-84ed-4084-dfe6-e5aef3e2452c

  • Property mode set to 100755
File size: 1003 bytes
Line 
1/*
2!!!~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~!!!
3!!! Copyright (c) 2017-20, Lawrence Livermore National Security, LLC
4!!! and DataRaceBench project contributors. See the DataRaceBench/COPYRIGHT file for details.
5!!!
6!!! SPDX-License-Identifier: (BSD-3-Clause)
7!!!~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~!!!
8*/
9
10
11/*
12This example is derived from an example by Simone Atzeni, NVIDIA.
13
14Description: Race on variable init. The variable is written by the
15master thread and concurrently read by the others.
16
17Solution: master construct at line 31:17 does not have an implicit barrier better
18use single. Data Race Pair, init@33:7 and init@36:13.
19*/
20
21#include <stdio.h>
22#include <stdlib.h>
23#include <stdio.h>
24
25int main (int argc, char **argv)
26{
27 int init, local;
28
29 #pragma omp parallel shared(init) private(local)
30 {
31 #pragma omp master
32 {
33 init = 10;
34 }
35
36 local = init;
37 }
38
39 return 0;
40}
41
42
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