main
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Last change
on this file was ea777aa, checked in by Alex Wilton <awilton@…>, 3 years ago |
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Moved examples, include, build_default.properties, common.xml, and README out from dev.civl.com into the root of the repo.
git-svn-id: svn://vsl.cis.udel.edu/civl/trunk@5704 fb995dde-84ed-4084-dfe6-e5aef3e2452c
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File size:
1.1 KB
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| 1 | !!!~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~!!!
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| 2 | !!! Copyright (c) 2017-20, Lawrence Livermore National Security, LLC
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| 3 | !!! and DataRaceBench project contributors. See the DataRaceBench/COPYRIGHT file for details.
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| 4 | !!!
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| 5 | !!! SPDX-License-Identifier: (BSD-3-Clause)
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| 6 | !!!~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~!!!
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| 7 |
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| 8 | !Concurrent access of var@30:13 without acquiring locks causes atomicity violation. Data race present.
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| 9 | !Data Race Pairs, var@30:13 and var@30:22.
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| 10 |
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| 11 | module DRB163
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| 12 | integer :: var(16)
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| 13 | integer :: i, j
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| 14 | end module
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| 15 |
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| 16 | program DRB163_simdmissinglock1_orig_gpu_no
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| 17 | use omp_lib
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| 18 | use DRB163
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| 19 | implicit none
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| 20 |
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| 21 | do i = 1, 16
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| 22 | var(i) = 0
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| 23 | end do
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| 24 |
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| 25 | !$omp target map(tofrom:var) device(0)
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| 26 | !$omp teams distribute parallel do
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| 27 | do i = 1, 20
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| 28 | !$omp simd
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| 29 | do j = 1, 16
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| 30 | var(j) = var(j)+1
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| 31 | end do
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| 32 | !$omp end simd
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| 33 | end do
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| 34 | !$omp end teams distribute parallel do
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| 35 | !$omp end target
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| 36 |
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| 37 | print*,var(16)
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| 38 |
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| 39 | end program
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