source: CIVL/examples/omp/dataracebench-1.3.2/micro-benchmarks-fortran/DRB163-simdmissinglock1-orig-gpu-no.f95

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Last change on this file was ea777aa, checked in by Alex Wilton <awilton@…>, 3 years ago

Moved examples, include, build_default.properties, common.xml, and README out from dev.civl.com into the root of the repo.

git-svn-id: svn://vsl.cis.udel.edu/civl/trunk@5704 fb995dde-84ed-4084-dfe6-e5aef3e2452c

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File size: 1.1 KB
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[e3f356c]1!!!~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~!!!
2!!! Copyright (c) 2017-20, Lawrence Livermore National Security, LLC
3!!! and DataRaceBench project contributors. See the DataRaceBench/COPYRIGHT file for details.
4!!!
5!!! SPDX-License-Identifier: (BSD-3-Clause)
6!!!~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~!!!
7
8!Concurrent access of var@26:13 has no atomicity violation. No data race present.
9
10module DRB163
11 integer :: var(16)
12 integer :: i, j
13end module
14
15program DRB163_simdmissinglock1_orig_gpu_no
16 use omp_lib
17 use DRB163
18 implicit none
19
20 do i = 1, 16
21 var(i) = 0
22 end do
23
24 !$omp target map(tofrom:var) device(0)
25 !$omp teams distribute parallel do reduction(+:var)
26 do i = 1, 20
27 !$omp simd
28 do j = 1, 16
29 var(j) = var(j)+1
30 end do
31 !$omp end simd
32 end do
33 !$omp end teams distribute parallel do
34 !$omp end target
35
36 do i = 1, 16
37 if (var(i) /= 20) then
38 print*, var(i), i
39 end if
40 end do
41
42end program
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