source: CIVL/examples/direct/nested_if.c@ f4bd985

1.23 2.0 main test-branch
Last change on this file since f4bd985 was 7f6ccad, checked in by Mitchell Gerrard <mitchellgerrard@…>, 10 years ago

Changing directed transformer's traversal of AST to post-order.

git-svn-id: svn://vsl.cis.udel.edu/civl/trunk@3699 fb995dde-84ed-4084-dfe6-e5aef3e2452c

  • Property mode set to 100644
File size: 99 bytes
Line 
1int x = 0;
2int y = 0;
3int main() {
4 if (x > 0) {
5 x++;
6 if (y > 0) {
7 y++;
8 }
9 }
10}
Note: See TracBrowser for help on using the repository browser.