| postIncrementReplacement(ExpressionNode) |  | 0% | | n/a | 1 | 1 | 34 | 34 | 1 | 1 |
| processUnaryNode(OperatorNode) |  | 7% | | 9% | 13 | 14 | 53 | 57 | 0 | 1 |
| preIncrementReplacement(ExpressionNode) | | 0% | | n/a | 1 | 1 | 30 | 30 | 1 | 1 |
| postDecrementReplacement(ExpressionNode) | | 0% | | n/a | 1 | 1 | 29 | 29 | 1 | 1 |
| preDecrementReplacement(ExpressionNode) | | 0% | | n/a | 1 | 1 | 23 | 23 | 1 | 1 |
| signedToUnsigned(ExpressionNode) | | 62% | | 25% | 5 | 7 | 12 | 30 | 0 | 1 |
| getBound() | | 85% | | 50% | 1 | 2 | 3 | 13 | 0 | 1 |
| processIntDivNode(OperatorNode) | | 96% | | 88% | 2 | 9 | 1 | 31 | 0 | 1 |
| processUnsignedArithNode(OperatorNode) | | 96% | | 70% | 3 | 7 | 1 | 33 | 0 | 1 |
| transform(AST) | | 100% | | 64% | 8 | 12 | 0 | 27 | 0 | 1 |
| processOtherNodes(ASTNode) | | 100% | | 100% | 0 | 16 | 0 | 23 | 0 | 1 |
| linkUnsignedArithLibrary(SequenceNode) | | 100% | | 75% | 6 | 13 | 0 | 19 | 0 | 1 |
| linkIntDivLibrary(SequenceNode) | | 100% | | 78% | 4 | 10 | 0 | 17 | 0 | 1 |
| processIntegerOperation(ASTNode) | | 100% | | 100% | 0 | 12 | 0 | 13 | 0 | 1 |
| IntOperationWorker(ASTFactory, Map, CIVLConfiguration) | | 100% | | n/a | 0 | 1 | 0 | 8 | 0 | 1 |